1 file number 2909.4 ha-5142 dual, 400khz, ultra-low power operational ampli?r the ha-5142 ultra-low power operational ampli?r provides ac and dc performance characteristics similar to or better than most general purpose ampli?rs while only drawing 1/30 of the supply current of most general purpose ampli?rs. in applications which require low power dissipation and good ac electrical characteristics, this device offers the industry s best speed/power ratio. the ha-5142 provides accurate signal processing by virtue of its low input offset voltage (2mv), low input bias current (45na), high open loop gain (100kv/v) and low noise (20nv/ hz), for low power operational ampli?rs. these characteristics coupled with a 1.5v/ s slew rate and a 400khz bandwidth make the ha-5142 ideal for use in low power instrumentation, audio ampli?r and active ?ter designs. the wide range of supply voltages (3v to 30v) also allow this ampli?r to be very useful in low voltage battery powered equipment. this device is also tested and guaranteed at both 15v and single ended +5v supplies. this ampli?r is available with industry standard pinouts which allow the ha-5142 to be interchangeable with most other dual operational ampli?rs. for military grade product refer to the ha-5142/883 data sheet. features low supply current . . . . . . . . . . . . . . . . . . . . . 45 a/amp wide supply voltage range single . . . . . . . . . 3v to 30v - or dual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5v to 15v high slew rate. . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5v/ s high gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100kv/v unity gain stable applications portable instruments meter ampli?rs telephone headsets microphone ampli?rs instrumentation - for further design ideas see application note 544 pinout ha-5142 (pdip, cerdip) top view ordering information part number temp. range ( o c) package pkg. no. ha3-5142-5 0 to 75 8 ld pdip e8.3 ha7-5142-2 -55 to 125 8 ld cerdip f8.3a out1 +in1 v- 2 3 4 1 v+ out2 +in2 7 6 5 8 + 1 2 -in1 -in2 - + - data sheet april 1999 caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 321-724-7143 | copyright intersil corporation 1999 www.datasheet.co.kr datasheet pdf - http://www..net/
2 schematic diagram -in +in v+ v- output v+ ha-5142 www.datasheet.co.kr datasheet pdf - http://www..net/
3 absolute maximum ratings thermal information supply voltage between v+ and v- terminals. . . . . . . . . . . . . . 35v differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7v output current . . . . . . . . . . . . . . . . . . . . . . . short circuit protected operating conditions temperature range ha-5142-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 o c to 75 o c ha-5142-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55 o c to 125 o c thermal resistance (typical, note 1) ja ( o c/w) jc ( o c/w) 8 lead pdip package . . . . . . . . . . . . . 120 n/a 8 lead cerdip package. . . . . . . . . . . 135 50 maximum junction temperature (hermetic packages). . . . . . . .175 o c maximum junction temperature (plastic packages) . . . . . . .150 o c maximum storage temperature range . . . . . . . . . . -65 o c to 150 o c maximum lead temperature (soldering 10s) . . . . . . . . . . . . 300 o c caution: stresses above those listed in ?bsolute maximum ratings may cause permanent damage to the device. this is a stress only rating and operatio n of the device at these or any other conditions above those indicated in the operational sections of this speci?ation is not implied. note: 1. ja is measured with the component mounted on an evaluation pc board in free air. electrical speci?ations r s = 100 ? , c l 10pf, unless otherwise speci?d parameter test conditions temp. ( o c) -2, -5 v+ = +5v, v- = 0v -2, -5 v+ = +15v, v- = -15v units min typ max min typ max input characteristics offset voltage note 11 25 - 2 6 - 2 6 mv full - - 8 - - 8 mv average offset voltage drift full - 3 - - 3 - v/ o c bias current note 11 25 - 45 100 - 45 100 na full - - 125 - - 125 na offset current note 11 25 - 0.3 10 - 0.3 10 na full - - 20 - - 20 na common mode range full 0 to 3 - - 10 - - v differential input resistance 25 - 0.6 - - 0.6 - m ? input noise voltage f = 1khz 25 - 20 - - 20 - nv/ hz input noise current f = 1khz 25 - 0.25 - - 0.25 - pa/ hz transfer characteristics large signal voltage gain notes 2, 4 25 20 100 - 20 100 - kv/v full 15 - - 15 - - kv/v common mode rejection ratio note 7 full 77 105 - 77 105 - db bandwidth notes 2, 3 25 - 0.4 - - 0.4 - mhz output characteristics output voltage swing notes 2, 10 25 1.0 to 3.8 0.7 to 4.2 - 10 13 - v full 1.2 to 3.5 0.9 to 4.0 - 10 13 - v full power bandwidth notes 2, 4, 8 25 - 240 - - 24 - khz ha-5142 www.datasheet.co.kr datasheet pdf - http://www..net/
4 transient response (notes 2, 3) rise time 25 - 600 - - 600 - ns slew rate note 6 25 0.8 1.5 - 0.8 1.5 - v/ s settling time note 5 25 - 10 - - 10 - s power supply characteristics supply current 25 - 45 80 - 100 150 a/amp full - - 100 - - 200 a/amp power supply rejection ratio note 9 full 77 105 - 77 105 - db notes: 2. r l = 50k ?. 3. c l = 50pf. 4. v o = 1.4 to 2.5v for v supply = +5, 0v; v o = 10v for v supply = 15v. 5. settling time is specified to 0.1% of final value for a 3v output step and a v = -1 for v supply = +5v, 0v. output step = 10v for v supply = 15v. 6. maximum input slew rate = 10v/ s. 7. v cm = 0 to 3v for v supply = +5, 0v; v cm = 10v for v supply = 15v. 8. full power bandwidth is guaranteed by equation: . 9. ? v s = +10v for v supply = +5, 0v; ? v s = 5v for v supply = 15v. 10. for v supply = +5, 0v terminate r l at +2.5v. typical output current is 3ma. 11. v o = 1.4v for v supply = +5v, 0v. electrical speci?ations r s = 100 ? , c l 10pf, unless otherwise speci?d (continued) parameter test conditions temp. ( o c) -2, -5 v+ = +5v, v- = 0v -2, -5 v+ = +15v, v- = -15v units min typ max min typ max fpbw slew rate 2 v peak --------------------------- = ha-5142 www.datasheet.co.kr datasheet pdf - http://www..net/
5 test circuits and waveforms figure 1. slew rate and transient response test circuit vertical scale: input = 5v/div.; output = 2v/div. horizontal scale: 2 s/div. large signal response vertical scale: input = 100mv/div.; output = 50mv/div. horizontal scale: 2 s/div. small signal response vertical scale: input = 2v/div.; output = 1v/div. horizontal scale: 5 s/div. large signal response vertical scale: input = 100mv/div.; output = 50mv/div. horizontal scale: 5 s/div. small signal response + in out 50k ? 50pf - input output +v supply = +15v, -v supply = -15v input output +v supply = +15v, -v supply = -15v input output +v supply = +5v, -v supply = 0v input output +v supply = +5v, -v supply = 0v ha-5142 www.datasheet.co.kr datasheet pdf - http://www..net/
6 typical performance curves v s = 2.5v, t a = 25 o c, unless otherwise speci?d figure 2. open loop frequency response figure 3. input offset current and bias current vs temperature figure 4. bandwidth and phase margin vs load capacitance figure 5. normalized ac parameters vs supply voltage figure 6. output voltage swing vs frequency and single supply voltage figure 7. normalized ac parameters vs temperature 110 100 90 80 70 60 50 40 30 20 10 0 -10 1 10 100 1k 10k 100k 1m 0 20 40 60 80 100 120 140 160 180 open loop voltage gain (db) phase (degrees) frequency (hz) r l = 50k ? c l = 50pf gain phase temperature ( o c) 70 60 50 40 30 20 10 -60 |i os | (na) i b (na) -40 -20 0 20 40 60 80 100 120 24 20 16 12 8 4 input offset current input bias current 100 o 80 o 60 o 40 o 20 o 0 o 10 100 1000 phase margin 0.4 0.3 0.2 0.1 unity bandwidth (mhz) load capacitance (pf) phase margin bandwidth r l = 50k ? 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0 1 2 3 4 5 6 7 8 9 10 supply voltage (v) normalized ac parameters referred to value at 2.5v slew rate bandwidth r l = 50k ? c l = 50pf v supply = +2.5v v supply = +3v v supply = +5v v supply = +10v v supply = +15v r l = 50k ? 14 12 10 8 6 4 2 0 1k 10k 100k 1m frequency (hz) output voltage swing (v p-p ) r l = 50k ? c l = 50pf slew rate bandwidth 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -60 normalized parameters referred to value at 25 o c -40 -20 -10 0 20 40 60 80 100 120 temperature ( o c) ha-5142 www.datasheet.co.kr datasheet pdf - http://www..net/
7 figure 8. input noise vs frequency figure 9. maximum output voltage swing vs load resistance and single supply voltage figure 10. psrr and cmrr vs frequency figure 11. power supply current vs temperature and single supply voltage figure 12. channel separation vs frequency typical performance curves v s = 2.5v, t a = 25 o c, unless otherwise speci?d (continued) noise voltage noise current 1000 100 10 1 1 1000 100 10 10,000 10 100 1k 10k 100k frequency (hz) input noise voltage (nv/ hz) input noise current (10 -15 a/ hz) v supply = +10v 16 100 output voltage swing (v p-p ) 1k 10k 100k v supply = +20v v supply = +5v v supply = +3v 14 12 10 8 6 4 2 -psrr +psrr, cmrr frequency (hz) 140 120 100 80 40 20 0 10 60 100 1k 10k 100k 1m psrr, cmrr (db) 80 70 60 50 40 30 20 10 -60 -40 -20 0 20 40 60 80 100 120 140 temperature ( o c) supply current per amplifier ( a) v s = +30v v s = +5v v s = +3v v s = +2v -140 -120 -100 -80 -40 -20 0 100 1k 10k 100k frequency (hz) channel separation (db) + - - + 100k ? 100k ? v o1 v o2 1k ? 1k ? 1k ? 1k ? c s = 20 log v o2 100 v o1 ----------------------- - ?? ?? ?? -60 ha-5142 www.datasheet.co.kr datasheet pdf - http://www..net/
8 die characteristics die dimensions: 104 mils x 55 mils x 19 mils 2650 m x 1400 m x 483 m metallization: type: al, 1% cu thickness: 16k ? 2k ? passivation: type: nitride (si 3 n 4 ) over silox (sio 2 , 5% phos.) silox thickness: 12k ? 2k ? nitride thickness: 3.5k ? 1.5k ? transistor count: 72 substrate potential (powered up): v- process: bipolar/jfet dielectric isolation metallization mask layout ha-5142 v- +in1 -in1 out1 +in2 -in2 out2 nc v+ ha-5142 www.datasheet.co.kr datasheet pdf - http://www..net/
9 ha-5142 dual-in-line plastic packages (pdip) c l e e a c e b e c -b- e1 index 1 2 3 n/2 n area seating base plane plane -c- d1 b1 b e d d1 a a2 l a 1 -a- 0.010 (0.25) c a m bs notes: 1. controlling dimensions: inch. in case of conflict between english and metric dimensions, the inch dimensions control. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. symbols are defined in the ?o series symbol list in section 2.2 of publication no. 95. 4. dimensions a, a1 and l are measured with the package seated in jedec seating plane gauge gs - 3. 5. d, d1, and e1 dimensions do not include mold flash or protru- sions. mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. e and are measured with the leads constrained to be per- pendicular to datum . 7. e b and e c are measured at the lead tips with the leads uncon- strained. e c must be zero or greater. 8. b1 maximum dimensions do not include dambar protrusions. dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. n is the maximum number of terminal positions. 10. corner leads (1, n, n/2 and n/2 + 1) for e8.3, e16.3, e18.3, e28.3, e42.6 will have a b1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). e a -c- e8.3 (jedec ms-001-ba issue d) 8 lead dual-in-line plastic package symbol inches millimeters notes min max min max a - 0.210 - 5.33 4 a1 0.015 - 0.39 - 4 a2 0.115 0.195 2.93 4.95 - b 0.014 0.022 0.356 0.558 - b1 0.045 0.070 1.15 1.77 8, 10 c 0.008 0.014 0.204 0.355 - d 0.355 0.400 9.01 10.16 5 d1 0.005 - 0.13 - 5 e 0.300 0.325 7.62 8.25 6 e1 0.240 0.280 6.10 7.11 5 e 0.100 bsc 2.54 bsc - e a 0.300 bsc 7.62 bsc 6 e b - 0.430 - 10.92 7 l 0.115 0.150 2.93 3.81 4 n8 89 rev. 0 12/93 www.datasheet.co.kr datasheet pdf - http://www..net/
10 all intersil semiconductor products are manufactured, assembled and tested under iso9000 quality systems certi?ation. intersil semiconductor products are sold by description only. intersil corporation reserves the right to make changes in circuit design and/or spec ifications at any time with- out notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by intersil is b elieved to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of th ird parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see web site www.intersil.com sales of?e headquarters north america intersil corporation p. o. box 883, mail stop 53-204 melbourne, fl 32902 tel: (321) 724-7000 fax: (321) 724-7240 europe intersil sa mercure center 100, rue de la fusee 1130 brussels, belgium tel: (32) 2.724.2111 fax: (32) 2.724.22.05 asia intersil (taiwan) ltd. 7f-6, no. 101 fu hsing north road taipei, taiwan republic of china tel: (886) 2 2716 9310 fax: (886) 2 2715 3029 ha-5142 ceramic dual-in-line frit seal packages (cerdip) notes: 1. index area: a notch or a pin one identification mark shall be locat- ed adjacent to pin one and shall be located within the shaded area shown. the manufacturer? identification shall not be used as a pin one identification mark. 2. the maximum limits of lead dimensions b and c or m shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 3. dimensions b1 and c1 apply to lead base metal only. dimension m applies to lead plating and finish thickness. 4. corner leads (1, n, n/2, and n/2+1) may be configured with a partial lead paddle. for this configuration dimension b3 replaces dimension b2. 5. this dimension allows for off-center lid, meniscus, and glass overrun. 6. dimension q shall be measured from the seating plane to the base plane. 7. measure dimension s1 at all four corners. 8. n is the maximum number of terminal positions. 9. dimensioning and tolerancing per ansi y14.5m - 1982. 10. controlling dimension: inch bbb c a - b s c q l a seating base d plane plane -d- -a- -c- -b- d e s1 b2 b a e m c1 b1 (c) (b) section a-a base lead finish metal e a/2 a m s s ccc c a - b m d s s aaa c a - b m d s s e a f8.3a mil-std-1835 gdip1-t8 (d-4, configuration a) 8 lead ceramic dual-in-line frit seal package symbol inches millimeters notes min max min max a - 0.200 - 5.08 - b 0.014 0.026 0.36 0.66 2 b1 0.014 0.023 0.36 0.58 3 b2 0.045 0.065 1.14 1.65 - b3 0.023 0.045 0.58 1.14 4 c 0.008 0.018 0.20 0.46 2 c1 0.008 0.015 0.20 0.38 3 d - 0.405 - 10.29 5 e 0.220 0.310 5.59 7.87 5 e 0.100 bsc 2.54 bsc - ea 0.300 bsc 7.62 bsc - ea/2 0.150 bsc 3.81 bsc - l 0.125 0.200 3.18 5.08 - q 0.015 0.060 0.38 1.52 6 s1 0.005 - 0.13 - 7 90 o 105 o 90 o 105 o - aaa - 0.015 - 0.38 - bbb - 0.030 - 0.76 - ccc - 0.010 - 0.25 - m - 0.0015 - 0.038 2, 3 n8 88 rev. 0 4/94 www.datasheet.co.kr datasheet pdf - http://www..net/
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